Structural,electrical, optical and dielectric properties of yttrium substituted cadmium ferrites prepared by Co-Precipitation method

The yttrium substituted cadmium ferrites having composition Cd_1-xY_xFe₂O₄ (X = 0.00, 0.125, 0.250, 0.375, 0.500) were synthesized by the co-precipitation method and sintered at 1100 °C for 6 h. Structural, morphological, electrical, optical and dielectric characteristics were explored by XRD, SEM, EDS, FTIR, I–V two probes, UV–Vis and LCR techniques.XRD results confirmed the cubic structure of spinel ferrites. A decrease in lattice constants of the prepared samples was observed with the substitution of Y ions and was attributed to the difference in ionic radii of Y³⁺ (0.95 Å) and Cd²⁺ (0.97 Å) ions. Cationic distributions, ionic radii of both tetrahedral and octahedral sites, tolerance factor, oxygen positional parameters, bond lengths, interatomic distances, positional parameters and bond length angles were calculated from XRD data. The morphology of the prepared ferrites was studied using SEM and results ratified the XRD results. EDS confirmed the presence of all inserted elements in Cd_1-xY_xFe₂O₄ composition. DC resistivity and drift mobility of soft-ferrites were found to be increased from 1.047 × 10⁸–4.822 × 10¹⁰ Ω-cm and 5.87 × 10⁻¹² – 1.045 × 10⁻¹⁴ cm²V⁻¹s⁻¹, respectively, at 523 K with yttrium content confirming the behavior of semiconductor materials. The optical band gap energy calculated from the UV–Vis pattern of the Cd_1-xY_xFe₂O₄ system was decreased from 3.6011 to 2.8153 eV. DC resistivity and optical band gaps exposed inverse relation. FTIR results revealed lower and upper-frequency absorption bands in the ranges of 419.31–417.01 cm⁻¹ and 540.95–565.70 cm⁻¹, respectively. Dielectric constant and dielectric losses were in decreasing order, while ac conductivity revealed rising behavior with increasing frequency. Results showed the potential of yttrium doped Cd nanoferrites for applications in high-frequency microwave absorbing devices.     

基于ＰＩＤ控制算法的直流微网容错控制方法研究

构建直流微网容错控制对象模型，调节直流微电网的输出回路参数；以输出功率、直流微网的 参考电压、弱电网下系统惯性响应特征等为约束参量，构建直流微网容错控制目标函数，在不同电网强度下 进行直流微网容错控制的参数自整定性调节，采用无功环比例积分控制方法进行直流微网容错寻优分析， 建立模糊 ＰＩＤ控制模型，采用变结构的模糊 ＰＩＤ控制方法进行直流微网容错控制过程中的自适应加权学习 和误差反馈调节，实现直流微网容错控制改进设计。仿真结果表明，采用该方法进行直流微网控制的容错 性能较好，输出稳定性较强，具有较好的直流微网输出增益。     

Compiler compatible 5.66 Mb/mm2 8T 1R1W register file in 14 nm FinFET technology

1-read/1-write (1R1W) register file (RF) is a popular memory configuration in modern feature rich SoCs requiring significant amount of embedded memory. A memory compiler is constructed using the 8T RF bitcell spanning a range of instances from 32 b to 72 Kb. An 8T low-leakage bitcell of 0.106 μm² is used in a 14 nm FinFET technology with a 70 nm contacted gate pitch for high-density (HD) two-port (TP) RF memory compiler which achieves 5.66 Mb/mm² array density for a 72 Kb array which is the highest reported density in 14 nm FinFET technology. The density improvement is achieved by using techniques such as leaf-cell optimization (eliminating transistors), better architectural planning, top level connectivity through leaf-cell abutment and minimizing the number of unique leaf-cells. These techniques are fully compatible with memory compiler usage over the required span. Leakage power is minimized by using power-switches without degrading the density mentioned above. Self-induced supply voltage collapse technique is applied for write and a four stack static keeper is used for read Vmin improvement. Fabricated test chips using 14 nm process have demonstrated 2.33 GHz performance at 1.1 V/25 °C operation. Overall V_min of 550 mV is achieved with this design at 25 °C. The inbuilt power-switch improves leakage power by 12x in simulation. Approximately 8% die area of a leading 14 nm SoC in commercialization is occupied by these compiled RF instances.     

SIS在赛科项目中的应用

目前，国内很多项目对安全仪表系统要求不是很严格，但随着人们对装置安全及人员保护更加深刻的认识，这类安全仪表系统会得到越来越多的重视和应用。简单介绍了SIS在赛科装置中的应用，SIS各个生命周期以及具体实施的方法，列出了安全度等级，要求故障概率等数据的计算方法。     

浅谈DC/DC变换器控制新方法

文中针对DC/DC变换器的特点,在现有控制和建模方法的基础之上,对DC/DC变换器的现代控制方法进行了归纳和总结,简要讨论了其控制原理,并比较了各种现代控制方法的优缺点,最后对DC/DC变换器控制方法的发展作了一定的展望。     

嵌人式与独立存储器设计上的差异分析和研究

进入21世纪,随着集成电路的发展,SoC(System on Chip)片上系统应运而生。而作为SoC重要组成部分的嵌入式存储器,在SoC中所占的比重正逐步增加,并起着越来越重要的作用,那么嵌入式存储器与独立的存储器芯片在设计上存在着哪些差异?对此本文将以NOR型闪存为例在制造工艺的选取、衍生产品的设计、功耗与噪声、后端功能仿真、测试与修复等方面进行分析和研究。     

计费帐务系统发展趋势分析

计费帐务系统作为业务运营支撑系统的重要组成部分。其发展方向日益受到运营商的关注。通过对计量帐务系统的研究，首先介绍了传统计费模式的现状以及存在的问题，然后结合各大公司产品对计责帐务系统的关键技术进行了分析，最后提出未来计费帐务系统的特征及对其发展趋势的展望。     

新型AXQ1-200A直流内燃弧焊机

针对目前国内内燃弧焊机结构复杂、控制损耗大、效率低等状况,研发了一种新型AXQ1-200 A直流内燃弧焊机.详细介绍了新型AXQ1-200 A直流内燃弧焊机的原理、结构特点及技术参数.该设备整机轻巧,移动方便,操作维护简便,既可提供用于野外手工电弧焊接的直流焊接电源,又可提供DC 220 V/3 000 W的辅助电源.     

HLA仿真系统因果追溯性设计

随着仿真系统变得日益复杂，基于仿真数据人为的进行因果追溯已经变得越来越凼难，所以必须对原有的仿真系统进行因果追溯性设计，使自动或半自动追溯凶果成为可能。为此，首先确定了因果关系追溯的整体思路，然后面对普遍使用的高层体系结构HLA分印仿直系统，深入分析对象类和交互类两类交互数据以及交互特点，井详细划分行为事件及因果关系类型；对HLA仿真系统中关键的联邦对象模型FOM以及仿真器进行扩展设计，从而实现系统的因果追溯性，为仿真因果追溯分析提供必要的数据。最后提出保证因果追溯需要注意的几项设计原则，并对设计所能够支持的应用做出展望。